BeeProg2

Features

GENERAL

• BeeProg2 is next member of USB/LPT-compatible, MS Windows (from Windows XP to Windows 10 32-bit and 64-bit) based ELNEC universal programmers, built to meet the strong demand of the small manufacturing and developers community for the fast and reliable universal programmer.
• BeeProg2 programmer is the improvement of BeeProg+ programmer, difference is much higher programming speed (up to 10x) of high-capacity memories, due to more powerful programming core (FPGA) inside.
• Supports all kinds of types and silicon technologies of today and tomorrow programmable devices without family-specific module. You have freedom to choose the optimal device for your design. Using built-in in-circuit serial programming (ISP) connector, the programmer is able to program ISP capable chips in circuit.
• BeeProg2 isn’t only a programmer, but also a tester of TTL/CMOS logic ICs and memories. Furthermore, it allows generation of user-definable test pattern sequences.
• Provides very competitive price coupled with excellent hardware design for reliable programming. Probably best “value for money”programmer in this class.
• Extremely fast programming due to high-speed FPGA driven hardware and execution of time-critical routines inside of the programmer. As a result, when used in manually-operated production, this one-socket-programmer in most cases waits for an operator.
• BeeProg2 interfaces with any IBM PC compatible personal computers, running MS Windows OS, through USB (2.0 HigSpeed) port or any standard parallel (printer) port. Support of both USB/LPT port connection gives you the choice to connect the BeeProg2 programmer to any PC, from latest notebook to older desktop without USB port.

HARDWARE

• FPGA based totally reconfigurable 48 powerful TTL pindrivers provide H/L/pull_up/pull_down and read capability for each pin of socket. Advanced pindrivers incorporate high-quality high-speed circuitry to deliver signals without overshoot or ground bounce for all supported devices. Improved pin drivers drivers operate down to 1.8V so you’ll be ready to program the full range of today’s advanced low-voltage devices.
• The programmer performs device insertion test based on the check of proper signal path between the programmer and programmed device before it programs each device. In dependence on programming configuration it identifies missed or poor contact between programmed device and the ZIF socket of the programming adapter (or the programmer directly), missed or poor contact between the programming adapter and the programmer and it’s also able to indicate wrong position of device in the ZIF socket of the programmer / the programming adapter (moved, rotated, backward oriented). These capabilities, supported by overcurrent protection and signature-byte check help prevent chip damage due to operator error.
• The selftest capability allow to run diagnostic part of software to thoroughly check the health of the programmer.
• Built-in protection circuits eliminate damage of programmer and/or programmed device due to environment or operator failure. All the inputs of the BeeProg2 programmer, including the ZIF socket, connection to PC and power supply input, are protected against ESD up to 15kV.
• When programming specification require, the (BeeProg2) programmer performs programming verification at the marginal level of supply voltage, which, obviously, improves programming yield, and guarantees long data retention.
• Various programming adapters are available to handle device in PLCC, JLCC, SOIC, SDIP, SOP, PSOP, SSOP, TSOP, TSOPII, TSSOP, QFP, PQFP, TQFP, VQFP, QFN (MLF), SON, BGA, EBGA, FBGA, VFBGA, UBGA, FTBGA, LAP, CSP, SCSP, LQFP, MQFP, HVQFN, QLP, QIP and other packages.

SOFTWARE

• Programmer is driven by an easy-to-use control program with pull-down menu, hot keys and on-line help. Selecting of device is performed by its class, by manufacturer or simply by typing a fragment of vendor name and/or part number.
• Standard device-related commands (read, blank check, program, verify, erase) are boosted by some test functions (insertion test, signature-byte check), and some special functions (autoincrement, production mode – start immediately after insertion of chip into socket).
• All known data formats are supported. Automatic file format detection and conversion during loading of file.
• The rich-featured auto-increment function enables one to assign individual serial numbers to each programmed device – or simply increments a serial number, or the function enables one to read serial numbers or any programmed device identification signatures from a file.
• The software also provide a many information about programmed device. As a special, the drawings of all available packages are provided. The software provide also explanation of chip labelling (the meaning of prefixes and suffixes at the chips) for each supported chip.
• The software provide a full information for ISP implementation: Description of ISP connector pins for currently selected chip, recommended target design around in-circuit programmed chip and other necessary information.
• The remote control feature allows to be PG4UW software flow controlled by other application – either using .BAT file commands or using DLL file. DLL file, examples (C/PAS/VBASIC/.NET) and manual are part of standard software delivery.
• Jam files of JEDEC standard JESD-71 are interpreted by Jam Player. Jam files are generated by design software which is provided by manufacturer of respective programmable device. Chips are programmed in-ZIF or through ISP connector (IEEE 1149.1 Joint Test Action Group (JTAG) interface).
• VME files are interpreted by VME Player. VME file is a compressed binary variation of SVF file and contains high-level IEEE 1149.1 bus operations. SVF files are interpreted by SVF Player. SVF file (Serial Vector Format) contains high-level IEEE 1149.1 bus operations. SVF files are generated by design software which is provided by manufacturer of respective programmable device. Chips are programmed in-ZIF or through ISP connector (IEEE 1149.1 Joint Test Action Group (JTAG) interface). VME files are generated by design software which is provided by manufacturer of respective programmable device. Chips are programmed in-ZIF or through ISP connector (IEEE 1149.1 Joint Test Action Group (JTAG) interface).
• Multiple devices are possible to program and test via JTAG chain: JTAG chain (ISP-Jam), JTAG chain (ISP-VME), JTAG chain (ISP-SVF) or JTAG chain (ISP-STP).
• Attaching of more BeeProg2 programmers to the same PC (through USB port) is achieved a powerful multiprogramming system, which support as many chips, as are supported by BeeProg2 programmer and without obvious decreasing of programming speed. It is important to know, there is a concurrent multiprogramming – each programmer works independently and each programmer can program different chip, if necessary.